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| 74F148 8-Line to 3-Line Priority Encoder April 1988 Revised July 1999 74F148 8-Line to 3-Line Priority Encoder General Description The F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits. Features s Encodes eight data lines in priority s Provides 3-bit binary priority code s Input enable capability s Signals when data is present on any input s Cascadable for priority encoding of n bits Ordering Code: Order Number 74F148SC 74F148SJ 74F148PC Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Inputs EI H L L L L L L L L L I0 X H X X X X X X X L I1 X H X X X X X X L H I2 X H X X X X X L H H I3 X H X X X X L H H H I4 X H X X X L H H H H I5 X H X X L H H H H H I6 X H X L H H H H H H Outputs I7 GS A0 A1 A2 EO X H L H H H H H H H H H L L L L L L L L H H L H L H L H L H H H L L H H L L H H H H L L L L H H H H H L H H H H H H H H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (c) 1999 Fairchild Semiconductor Corporation DS009480 www.fairchildsemi.com 74F148 Unit Loading/Fan Out U.L. Pin Names I0 I1-I7 EI EO GS A0-A2 Description HIGH/LOW Priority Input (Active LOW) Priority Inputs (Active LOW) Enable Input (Active LOW) Enable Output (Active LOW) Group Signal Output (Active LOW) Address Outputs (Active LOW) 1.0/1.0 1.0/2.0 1.0/1.0 50/33.3 50/33.3 50/33.3 Input IIH/IIL Output IOH/IOL 20 A/-0.6 mA 20 A/-1.2 mA 20 A/-0.6 mA -1 mA/20 mA -1 mA/20 mA -1 mA/20 mA Functional Description The F148 8-input priority encoder accepts data from eight active LOW inputs (I0-I7) and provides a binary representation on the three active LOW outputs. A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line 7 having the highest priority. A HIGH on the Enable Input (EI) will force all outputs to the inactive (HIGH) state and allow new data to settle without producing erroneous information at the outputs.A Group Signal output (GS) and Enable Output (EO) are provided along with the three priority data outputs (A2, A1, A0). GS is active LOW when any input is LOW: this indicates when any input is active. EO is active LOW when all inputs are HIGH. Using the Enable Output along with the Enable Input allows cascading for priority encoding on any number of input signals. Both EO and GS are in the inactive HIGH state when the Enable Input is HIGH. Logic Diagram Application 16-Input Priority Encoder Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 74F148 Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) -0.5V to VCC -0.5V to +5.5V -65C to +150C -55C to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0C to +70C +4.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI ICEX VID IOD IIL Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output High Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current IOS ICCH ICCL Output Short-Circuit Current Power Supply Current Power Supply Current -60 4.75 3.75 -0.6 -1.2 -150 35 35 10% VCC 5% VCC 10% VCC 2.5 2.7 0.5 5.0 7.0 50 Min 2.0 0.8 -1.2 Typ Max Units V V V V V A A A V A mA mA mA mA mA Max Max Max Min Min Min Max Max Max 0.0 0.0 Max VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -1 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V (I0, EI) VIN = 0.5V (I1-I7) VOUT = 0V VO = HIGH VO = LOW 3 www.fairchildsemi.com 74F148 AC Electrical Characteristics TA = +25C Symbol Parameter Min tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay In to An Propagation Delay In to EO Propagation Delay In to GS Propagation Delay EI to An Propagation Delay EI to GS Propagation Delay EI to EO 3.0 3.0 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 3.0 VCC = +5.0V CL = 50 pF Typ 7.0 8.0 5.0 5.5 7.0 6.0 6.5 6.0 5.0 6.0 5.5 8.0 Max 9.0 10.5 6.5 7.5 9.0 8.0 8.5 8.0 7.0 7.5 7.0 10.5 TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 3.0 3.0 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 3.0 Max 10.0 12.0 7.5 8.5 10.0 9.0 9.5 9.0 8.0 8.5 8.0 12.0 ns Units ns ns ns ns ns www.fairchildsemi.com 4 74F148 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 5 www.fairchildsemi.com 74F148 8-Line to 3-Line Priority Encoder Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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